The validation of a processor based System-On-Chip (SoC) typically implements digital register transfer level (RTL) simulations. The simulations verify the correctness of the RTL code and system operability. A simulation model is used to emulate the processor. The processor executes one or more sample test programs in which the processor interacts with one or more peripherals. A disadvantage of the existing approach is a bottle-neck in the analysis of simulation results in case of failures.
Conventional approaches use a number of tools and methodologies to perform debugging. For example, conventional approaches include (i) manual debugging using the debugging features of digital simulators and processor simulation models, (ii) using software simulators and (iii) using co-simulators. Manual debugging involves analyzing the signal waveforms and examining the processor simulation model output files. The drawback of such an approach is the length of time needed and the number of errors.
A second conventional approach uses software simulators. The majority of processor development kits provide a software simulator. Replicating the RTL simulation on the software simulators has some draw-backs. For example, modeling the behavior of a complex peripheral (such as an Ethernet controller) can use considerable software resources and can be difficult to implement at a chip level. Furthermore, a software approach may help identify issues within a test-program, but may not be useful in debugging the RTL code.
A third conventional approach uses co-simulators. Co-simulators provide the most powerful tools for debugging by allowing a user to interact with the simulation by (i) monitoring memory accesses, (ii) observing processor status at a given point, (iii) stopping simulation at critical points by setting breakpoints, and (iv) forcing new values into register. The drawbacks of such an approach include (i) the cost of tools and (ii) the availability of suitable co-simulator models for the specific processor implemented.
It would be desirable to implement a debugging methodology that implements a graphical user interface to provide a solution that is easy to implement.